http://dokuwiki.reauktion.de/ 2026-05-26T23:57:20+00:00 http://dokuwiki.reauktion.de/ http://dokuwiki.reauktion.de/lib/exe/fetch.php?media=wiki:dokuwiki.svg text/html 2026-04-21T07:41:21+00:00 Anonymous (anonymous@undisclosed.example.com) http://dokuwiki.reauktion.de/doku.php?id=megabitchip:2026-04-20_dokuwiki&rev=1776757281&do=diff MVP2 session 2026-04-20 — matching-decomp blitz Single session, 1/118 → 33/118 functions matching-decomped. Canonical compile line settled + poll-site coverage jumped to 15/16. Canonical compile line clang -O2 -ffreestanding -mgeneral-regs-only \ [-fno-pic] # when referencing extern data symbols [-fno-builtin] # when lifting memcpy/memset [-fno-unroll-loops] # for small fixed-count loops text/html 2026-04-21T20:32:36+00:00 Anonymous (anonymous@undisclosed.example.com) http://dokuwiki.reauktion.de/doku.php?id=megabitchip:2026-04-21_extended&rev=1776803556&do=diff MegabitChip — Session 2026-04-21 (Extended) Extended session on top of the reloc-splice + mmio-diff work landed earlier the same day. Focus: close the gap between write-sequence equality (mmio_diff green) and actually running on silicon without bricking text/html 2026-04-21T07:42:30+00:00 Anonymous (anonymous@undisclosed.example.com) http://dokuwiki.reauktion.de/doku.php?id=megabitchip:2026-04-21_reloc_splice&rev=1776757350&do=diff MegabitChip — Session 2026-04-21 (Reloc-Splicer Pass) Goal: prove source-rebuilt parity with vendor DDR blob by splicing each matching-decomp candidate.o into the vendor binary (with full relocation resolution) and running the reachability trace. Baseline vendor reaches text/html 2026-04-21T08:14:07+00:00 Anonymous (anonymous@undisclosed.example.com) http://dokuwiki.reauktion.de/doku.php?id=megabitchip:2026-04-21_simulation&rev=1776759247&do=diff MegabitChip — Session 2026-04-21 Part 2 (Simulation & MMIO-Diff) Continues the 2026-04-21 reloc-splice session. Goal: close the 47/54 reach gap with simulation tooling. Result * Three new validation tools built: lockstep.py, mmio_diff.py, text/html 2026-04-24T17:28:10+00:00 Anonymous (anonymous@undisclosed.example.com) http://dokuwiki.reauktion.de/doku.php?id=megabitchip:ddr_frequency_switching&rev=1777051690&do=diff DDR Frequency Switching on RK3588 (LPDDR5) This page documents how to change the DDR frequency on RK3588 platforms (as shipped by the rkbin DDR init blob) and records the observed LPDDR5-6400 / 3200 MHz operation on ampere (CoolPi CM5 GenBook, 32 GB text/html 2026-04-25T20:59:59+00:00 Anonymous (anonymous@undisclosed.example.com) http://dokuwiki.reauktion.de/doku.php?id=megabitchip:pinetab2_ddr&rev=1777150799&do=diff DDR Frequency Switching on PineTab2 / RK3566 (LPDDR4) This page documents how to change the DDR frequency on the Pine64 PineTab2 v2.0 (Rockchip RK3566, 8 GB LPDDR4 as 2x 4 GB) by swapping the rkbin TPL DDR-init blob, and records the production-stable 1332 MT/s text/html 2026-04-21T20:32:36+00:00 Anonymous (anonymous@undisclosed.example.com) http://dokuwiki.reauktion.de/doku.php?id=megabitchip:port_matrix&rev=1776803556&do=diff MegabitChip — Port Matrix Per-function status for the “monster” ports and any port that needs a narrative beyond the one-line entry in check_asm.sh. Short ports that are source-complete, byte-matching, and need no commentary live only in ~/projects/AMPere/benchmark/ text/html 2026-04-21T20:32:36+00:00 Anonymous (anonymous@undisclosed.example.com) http://dokuwiki.reauktion.de/doku.php?id=megabitchip:simulation_stack&rev=1776803556&do=diff MegabitChip — Simulation & Verification Stack Reference page for the pre-silicon simulation + audit tooling used to guard the MegabitChip rebuild. All tools assume the canonical compile line from the blitz session and operate on blob images produced by reloc_splice.py text/html 2026-04-25T21:05:18+00:00 Anonymous (anonymous@undisclosed.example.com) http://dokuwiki.reauktion.de/doku.php?id=megabitchip:start&rev=1777151118&do=diff MegabitChip Running index for the MegabitChip workstream — reverse-engineering and source-rebuilding the RK3588 DDR init blob (''rk3588_ddr_lp4_1848MHz_lp5_2112MHz_v1.19.bin'') with the goal of producing a buildable, working DDR blob